User:Nheroux/sandbox

Alexander Tetelbaum
Founding President of International Solomon University, Kiev, Ukraine, 1990
Born	(1948-08-16)August 16, 1948 Kiev, Ukraine
Alma mater	National Technical University of Ukraine (PhD) Taganrog State University of Radio-Engineering, Russia]] (PhD+ or Advanced PhD)
Known for	Electronic Design Automation, Artificial Intelligence
Awards	For outstanding achievements in science and technology (1985) ) Achievements in Science (1991) Order of the Badge of Honor (1993)
Scientific career
Fields	Computer science
Institutions	National Technical University of Ukraine, International Solomon University, Michigan State University, Silicon Graphics, LSI Corporation
Doctoral students	Nickolay Lugansky Boris Shramchenko Nickolay Zabaluev Angel Angelov Vladimir Itkin

Alexander Tetelbaum (born August 16, 1948) is an American-Ukrainian computer scientist , educator , academician , inventor , entrepreneur , and novelist .

Renowned for his pioneering contributions to Electronic Design Automation (EDA)

and Artificial Intelligence (AI) .

Tetelbaum has been active in these fields since the 1960s. He is the founder and first president of the International Solomon University, established in 1991 to promote academic innovation and research .

With over 40 U.S. patents and 250 publications – 15 books, more than 100 International Refereed Papers, and 150 conference proceedings papers, Tetelbaum's work has significantly impacted technology and science. He has been honored with government medals for “Government Medal “For outstanding achievements in science and technology” (1985), "Achievements in Science" (1991) , and "Order of the Badge of Honor" (1993) .

Dr. Alexander Tetelbaum is featured on WorldAtlas.com as a notable Ukrainian native , recognized for his significant contributions as an inventor and scientist. The site acknowledges his impactful work and highlights his contributions to the country's intellectual and scientific legacy. The inclusion is especially prestigious, as the list is limited to only 160 individuals, both historical and contemporary, across diverse fields of achievement. Tetelbaum’s legacy is further commemorated by a star named "Dr. Alexander Tetelbaum" in the constellation Leo (Right Ascension: 10h41m55.30s, Declination: +08.24.52.0) .

Tetelbaum has held numerous esteemed positions across academia and industry, receiving various honors and awards throughout his career. He is a Fellow and Honorary Doctor at several academic institutions and organizations, including: • Foreign Fellow of the Russian Academy of Natural Sciences (since 1995), • Foreign Fellow of the Russian Fuzzy Systems Association (since 1996) , • ABI Research Fellow at the American Biographical Institute (since 1996), • Honorary Doctor at Dneprodzerzhinsk State Technical University (1996).

Dr. Tetelbaum’s contributions have been recognized in numerous biographical directories, reflecting his influence and prominence in the fields of science, technology, and education. He has been included in several prestigious publications, including: • Who’s Who in the World (12th–14th Editions, 1995–1997) , • Longman Reference on Research Directories (1994) , • Men of Achievement (16th–17th Editions, 1994–1995) , • Who’s Who in Technology (17th Edition, 1995) , • Who’s Who in American Education (5th Edition, 1996–1997) , • 5000 Personalities of the World (5th Edition, 1996) , • Who’s Who in Science and Engineering (3rd Edition, 1996–1997) , • The International Directory of Distinguished Leadership (6th Edition, 1996) . These inclusions underscore Dr. Tetelbaum's enduring impact on the academic and scientific communities, as well as his dedication to advancing education and technological innovation.

Early life and education

Alexander Tetelbaum was born on August 4, 1948, in Kyiv, Ukraine, to Yakov and Eugina Tetelbaum, both Jewish and survivors of the Holocaust. His father was a professor at the Kyiv Polytechnic Institute and served in World War II, earning several medals. Tragically, he passed away in 1963 at the age of 36 from a perforated ulcer, likely worsened by inadequate wartime nutrition, and due to a medical error. His uncle was a famous Ukrainian scientist Semyon Tetelbaum who founded the Radio-Technical College in the Kyiv Polytechnic Institute, Alexander’s mother, Eugina, was an engineer at a military plant. She worked together and was friendly with a former Soviet dissident, Natan Sharansky who spent nine years imprisoned as a refusenik during the 1970s and 1980s. She passed away in 2016 at the age of 93. He also has a twin sister, Maria.

At six months old, Alexander suffered a severe burn on his arm, requiring two months of hospitalization and three surgeries due to infections caused by contaminated syringes. His weight was less than the weight he was born. His health struggles as a young child contributed to a challenging early development, including some speech issues.

Although his parents were never members of the Communist Party and were privately critical of the regime, they emphasized education and critical thinking. Following World War II, antisemitism reached a troubling peak in the Soviet Union, spurred by secret policies within the Communist Party of the Soviet Union aimed at systematically restricting Jewish people’s access to academic, scientific, and professional positions. Although the Nazi regime had been defeated, Soviet leadership, especially under Joseph Stalin, maintained discriminatory policies. Stalin orchestrated plans to relocate Jewish citizens to the Jewish Autonomous Region in Birobidzhan, Siberia, with the stated aim of creating a Soviet Jewish homeland, though the motives and outcomes were complex and often oppressive. Within this environment, Jewish individuals like Alexander Tetelbaum faced systemic obstacles in academia and science, requiring them to work significantly harder than their non-Jewish peers to achieve similar recognition or opportunities. Being the only Jewish student, and later an employee in his entire college of Radio-Electronic, Tetelbaum's struggle was emblematic of the broader barriers faced by Jewish people in the Soviet Union, who often had to excel far beyond their Russian colleagues to be considered for educational and professional opportunities. Finally, it was the main reason for his immigration to the U.S.

Initially, Alexander was a C student with little interest in academics, but in seventh grade, his focus changed dramatically. His aptitude for mathematics led him to an advanced school specializing in math and physics. During that time, he won several math Ukrainian Olympiads. He developed an early interest in electronics, inventing a machine to grade multiple-choice exams and a digital lock, both of which won national student awards. Additionally, he pursued gymnastics, becoming a master of the sport.

Alexander graduated from the Kyiv Mathematical High School with honors and enrolled in the National Technical University of Ukraine in 1966. The following year, he married Slava Bass and began working part-time as a mechanic in a radio-electronics lab. Soon after, he was hired as a junior scientist by his department chair, Professor Vitaly Sigorsky. He wrote his first paper in 1968, which was published in 1971, "Some Theorems about Circuit Matrix Functions," in Electronic Design Automation (Kyiv, 1971). During this time, Tetelbaum made a groundbreaking discovery: computers could not only solve equations but also generate them. This insight laid the foundation for advances in computational methods within electronic design and marked a shift in the role of computers from passive calculators to active participants in problem-solving. This concept influenced future developments in Electronic Design Automation (EDA), advancing the way engineers and scientists approached complex system design.

During his university years, Tetelbaum received the "National Technical University of Ukraine Distinguished Scholarship" (1966–1972) and won multiple National Competitions for "The Best Student Scientific Work" (1970–1972). By the end of his six-year program, he had authored eight published papers. In 1972, he graduated with an MS in Electronics with high honors.

After graduation, he worked in the CAD Department at the famous Kyiv Institute of Cybernetics (1972–1973) before entering a PhD program at the National Technical University of Ukraine. In 1975, he published 19 papers and completed his PhD dissertation, titled “Research and Development of Computer Methods for Electronic Design Automation.” He was awarded a PhD in Electrical and Computer Engineering by the university’s Scientific Panel, with this degree recognized by the Highest Attestation Commission of the Soviet Union .

Academic career

Alexander Tetelbaum got his Doctor of Engineering Science (PhD+ or Advanced PhD), in Computer Sciences and Engineering, National University of Radio-Engineering of Russia (Taganrog), 1986. Title of Thesis: Mathematical Foundations of Metrically Topological Design of VLSI in CAD Systems [Classified]. There are only relative few who earned the distinguished degree of Doctor of Engineering Science, which requires a second advanced thesis (dissertation) and at least ten years of outstanding scholarly contributions beyond the Ph.D. Note that Dr. Eric Goodman from Michigan State University has classified this degree as having at least the status of a Fellow in a major U.S. professional society. (Recommendations Section). Doctor of Science is a "higher doctorate" awarded in recognition of a national/international substantial and sustained contribution to scientific knowledge beyond that required for a PhD.

Administrative Appointments
President, International Solomon University, Kyiv, Ukraine, 1991- 1995
Associate Dean for International Studies and Programs, Engineering College, Michigan State University, 1994-1996
President of International Solomon Association, 1995-1997

Regular Appointments
Professor, Distinguished Scientist, Computer and Electrical Engineering Department, National Technical University of Ukraine, 1987-1992
Professor, National Technical University of Ukraine Advanced Courses for Senior Industrial Engineers, 1980-1987
Professor, Electrical Engineering and Computer Science Department, Michigan State University, 1993-1996

Leave Appointments
Visiting Professor, State Engineering University of Armenia, 1983 (Sep-Oct)
Visiting Professor of Computer Science, Taganrog State University of Radio-Engineering of Russia, 1986 (May-June)
Visiting Scholar and Professor of Electrical and Computer Engineering, Michigan State University, USA, 1993 (Jan) 1994 (Dec)
Visiting Professor, Kaunas University of Technology, Lithuania (1994)
Visiting Professor, Tallinn Technical University, Estonia (1995)
A reviewer for the American Mathematical Society, 1994-1999.

Corporate career

Dr. Tetelbaum led design methodology and automation teams in LSI Corporation, Silicon Graphics (SGI), Zycad Corporations, and was CEO of Abelite Design Automation, Inc.

Appointments
Engineer, CAD Department, Kiev Institute of Cybernetics, 1972-1973
Junior Scientist, Computer Science Department, National Technical University of Ukraine, 1973-1975
Director of Design Automation Lab, National Technical University of Ukraine, 1975-1987
President, Center of International Solomon University, 1991-1995
Chief Scientist of Parallel Simulation, Zycad Corporation, 1996-1997
CAD Manager, Silicon Graphics Corporation, 1996-1998
Principal Engineer / Engineering Manager, LSI Corporation, 1998-2012
[Source 1] President/CTO, Intreen Corp.,
[Source 2] President & CEO, Abelite Design Automation, Inc, , 2012-2022.

In 2005, March 2005, Alexander Tetelbaum and his family established Intreen Corp. ^{[Source 1]}(Intelligent Relation Engine) in California (Company Number 2727941). The company specialized in developing an innovative AI-driven relational search technology. This platform enabled users to conduct complex inquiries by finding, processing, and organizing comprehensive knowledge representation about various objects of interest. One of its hallmark features was the ability to identify and present hidden and remote relationships within data. The Intreen search engine could access and retrieve information from diverse sources, including the Internet, Intranet, and Extranet (knowledge acquisition. It supported multiple formats, languages, and data types, including image classification and data. Alexander Tetelbaum served as both President and Chief Technology Officer, overseeing the creation of a successful proof of concept and the filing of 4 provisional patents^{[P1-P4, Intreen]} to protect the company's groundbreaking innovations. Despite the promising potential of its technology, Intreen Corp. was dissolved in 2005 due to familial challenges. A divorce between Tetelbaum’s daughter and his son-in-law, both of whom held corporate officer roles, brought operational and structural difficulties that ultimately led to the company's closure.

On February 12, 2012, Dr. Alexander Tetelbaum co-founded Abelite Design Automation, Inc.^{[Source 2} in California with his long-time colleague, Dr. Samary Baranov . The company initially focused on advancing a groundbreaking fourth-generation High-Level Synthesis (HLS) technology for large-scale digital electronics and systems, including Finite-state machine with intricate control and data flow architectures. Within a year, the team successfully developed a fully automated system capable of synthesizing digital designs directly from Electronic System Level (ESL) specifications to Hardware Description Language (HDL) at the Register-Transfer Level (RTL). The system employed Algorithmic State Machine (ASMs) for graphical system behavior modeling and introduced hierarchical ASM-based transformations for behavioral and structural synthesis at every stage. This innovative approach enabled rapid prototyping, optimization, verification, and the generation of comprehensive design documentation and specifications. While the technology demonstrated significant promise, funding limitations led Dr. Baranov to leave Abelite and establish a new venture, Synthezza, in Canada. Subsequently, Abelite shifted its focus to Dr. Tetelbaum’s research specialization in Statistical Static Timing Analysis (SSTA). Under this direction, the company developed several tools to enhance timing analysis workflows, using timing reports from Synopsys PrimeTime as primary input. However, Synopsys restricted the integration of their reports into Abelite’s design flow, limiting potential client adoption. The theory and powerful timing tools were created and 5 patents^{[P1-P5, Abelite]} were written to protect the company's groundbreaking novelties Facing these challenges, Abelite pivoted to addressing the minimization of the number of timing signoff corners but was unable to regain traction. In 2022, after a decade of innovation and contributions to the field, Abelite Design Automation, Inc. was formally dissolved.

Awards and honors

Soviet Union Medal "Order of the Badge of Honor" (1993)
Soviet Union Medal "Achievements in Science" (1991)
Soviet Union Medal “For outstanding achievements in science and technology” (1985)
President, International Academy of Sciences and Arts (1995-1996)
President Emeritus, International Solomon University (since 2002)
“Best Technical Paper Award” by the SNUG Technical Committee (2011)
"The Best Paper of the Year" of the magazine of Foreign Electronics (1981)
"The Best Paper of the Year" of the magazine of Foreign Electronics (1977)
Honorary Doctor, Dneprodzerzhinsk State Technical University (1996)
LSI Logic Corp.: Patent champion (2001-2012), Technical Excellence Award (2001)
Engineering Excellence Award (2000)
Key Contributor Award (1999)
Honor Certificates for achievements in professional and scientific activity (1976-1991)
Winner of the National Competitions of "The Best Student Scientific Work" (1970-1972)

Contributions in computer science

Research areas Contracts, etc. xxx He is elected Senior Scientist in CAD Systems, the National Highest Certification Commission in 1986. He received several Honor Certificates for achievements in professional and scientific activity in 1976-1991. During his academic work, Dr. Tetelbaum was a Principal Investigator for 21 large commercial and governmental grants and contracts. He presented over 50 invited talks and seminars for a variety of universities and industrial audiences. He was the invited speaker at the Mathematics Research Colloquium at AT&T Bell Laboratories (Murray Hill), at the Computer Science Colloquium at Michigan State University, at Computer-Aided Design Seminar at Texas Instrument, Inc. (Houston); and at several universities of Russia, Ukraine, Estonia, and Lithuania.

Intreen: AI relation search. Prototype, implemented, demo in Yahoo.com. Represented by Fish, Rosanny. Dissolved in 2006 due to family issues. Abelite-DA: SSTA tools, statistical postprocessing after TrimeTime (Synopsys). Issues with Synopsys, was a pilot program, success with several customers, dissolved due to …

Rent's Rule [IEEE nomination]

See my IEEE Nomination fie.

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Dr. Tetelbaum also worked on several intelligence projects for the Soviet Union military-industrial complex, including the development of sophisticated data mining software for preventing espionage. He also was a member of an elite team dedicated to the development of submarines, aircraft, and advanced technologies.

Major publications

Dr. Alexander Tetelbaum has a prolific body of work, with over 250 publications spanning various fields of science, technology, education, and fiction. His contributions highlight his versatility as a researcher, educator, and novelist. Below is an organized breakdown of his publications:

Categories of Publications:
Books: (Referred as [B-Number])
Science/Technical Books: 8 books focusing on Electronic Design Automation (EDA), Artificial Intelligence (AI), and related fields.
Educational Books: 4 books dedicated to methodologies for solving creative and non-standard problems.
Fiction Novels: 2 novels blending fiction with thought-provoking themes.

Research and Technical Papers: (Referred as [Number])
Sole-Authored Publications: 94 works showcasing his independent research and thought leadership.
International and US Journals: 19 papers published in reputable journals, recognized globally.
Translated Papers: 14 papers originally published in other languages and translated into English, reflecting their international impact.
Refereed Papers: 108 peer-reviewed articles published in top-tier international journals.
Conference Proceedings: 101 papers presented at major academic and professional conferences.

Other Scholarly Contributions: (Referred as [Number-Source])

Research Reports: 71 in-depth reports on his research findings, often aimed at advancing scientific knowledge.
Invited Presentations: 51 keynote or invited presentations delivered at prestigious forums and conferences.

Upcoming List: The main (selected) titles of these publications will follow in a detailed bibliography. This list will include seminal works that shaped advancements in EDA and AI, as well as his contributions to education and literature.

Technical Books
[B1] Minimum Number of Timing Signoff Corners
[B2] Electronic Design Automation, Kiev, Knowledge Publisher, 1975. [Co-authors: TETELBAUM, A., PETRENKO, A.I., and BUDNYAK, A.A.]
[B3] Planar Design of Electronic Circuits, Kiev, Knowledge Publisher, 1977. [Co-authors: TETELBAUM, A., PETRENKO, A.I., and SHRAMCHENKO, B.L. ]
[B4] Formal Design of Computer Systems, Moscow, Radio and Communication Publisher, 1979. [Co-authors: TETELBAUM, A. and PETRENKO, A.I. ]
[B5] CAD of Electronic Equipment Topological Approach, Kiev, Higher Education Publisher, 1980, 1981 (2nd edition). [Co-authors: TETELBAUM, A., PETRENKO, and SHRAMCHENKO, B.L. ]
[B6] CAD of VLSI Circuits, Kiev, Higher Education Publisher, 1983. [Co-authors: TETELBAUM, A., PETRENKO, A.I., SYPCHUK, P.P., IVANNIKOV, A.D. and SAVATIEV, W.A. ]
[B7] Topological Algorithms of Multilayer Printed Circuit Boards Routine, Moscow, Radio and Communication Publisher, 1983. [Co-authors: TETELBAUM, A., PETRENKO, and ZABALUEV, N.N. ]
[B8] CAD VLSI Circuits on Master Slice Chips, Moscow, Radio and Communication Publisher, 1988. [Co-authors: TETELBAUM, A., PETRENKO, A.I., LOSHAKOV, W.N., and SHRAMCHENKO, B.L. ]
[B9] Increasing of CAD Systems Effectiveness, Kiev, Higher Education Publisher, 1991. [Co-authors: TETELBAUM, A., PETRENKO, A.I., and ITKIN, V.M.

Russian main books:

• Формальное конструирование электронно-вычислительной аппаратуры / А. И. Петренко, А. Я. Тетельбаум. - Москва : Сов. радио, 1979. - 256 с. : ил.; 20 см. - (Б-ка радиоконструктора).
• Топологические алгоритмы трассировки многослойных печатных плат / А. И. Петренко, А. Я. Тетельбаум, Н. Н. Забалуев. - М. : Радио и связь, 1983. - 151 с. : ил.; 21 см.
• Автоматизация конструирования электронной аппаратуры : (Топол. подход) / А. И. Петренко, А. Я. Тетельбаум, Б. Л. Шрамченко. - 2-е изд., стереотип. - Киев : Вища школа, 1981. - 175 с. : ил.; 20 см.; ISBN В пер. (В пер.)
• Повышение эффективности использования САПР РЭА : [Учеб. пособие для студентов спец. "Системы автоматизир. проектирования" и для слушателей МИПК] / А. И. Петренко, А. Я. Тетельбаум, В. М. Иткин; М-во высш. и сред. спец. образования УССР, Учеб.-метод. каб. по высш. образованию и др. - Киев : УМКВО, 1991. - 110 с. : ил.; 20 см.; ISBN 5-7763-0810


Educational Books
[B10] Yes-No Puzzles-Games
[B11] Puzzle Games for Kids
[B12] Solving Non-Standard Problems
[B13] Solving Non-Standard Very Hard Problems Solving Non-Standard Very Hard Problems, 2022 https://www.amazon.com/Solving-Non-Standard-Very-Hard-Problems/dp/B0B413TW2M

Novels
[B14] Omerta Operations
[B15] Executive Director
Several other publishers(like Barnes & Noble, Apple Books, eBay, etc.) also published the above novels in the U.S. and other countries.

Major Papers (International Refereed Papers)
[1] TETELBAUM, A. "Some Theorems about Circuit Matrix Functions", Electronic Design Automation, Kiev, 1971, No. 4.
[2] TETELBAUM, A. "Effective Algorithm for Matrix Inverting", Electronic Design Automation, Kiev, 1972, No. 6. TETELBAUM, A. "Topology Matrix Method of Polynomial Coefficients Circuit Functions Determination", Transaction of Soviet Higher Education Radioelectronics, 1972, Vol. 15, No. 3, pp.379 385. [Translated in English by Plenum Publishing Corporation (USA).] PETRENKO, A.I. and TETELBAUM, A. "Calculation of Optimal Parametric Component Areas", Transaction of Soviet Higher Education Radioelectronics3, 1972, Vol. 15, No. 6, pp.691 698.
[3] PETRENKO, A.I. and TETELBAUM, A. "Formulas of Invariance for the Electronic Circuit Sensibility", Electronic Design Automation, Kiev, 1973, No. 7.
[4] PETRENKO, A.I. and TETELBAUM, A. "Minimization of the Electronic Circuit Sensibility", Electronic Design Automation, Kiev, 1973, No. 7.
[5] TETELBAUM, A. "Calculation of Optimal Reserves on Element Parameters", Electronic Design Automation, Kiev, 1973, No. 8.
[6] TETELBAUM, A. and BOBOVSKY, V.V. "Public Pin Placement", Calculations Methods, Kaunas, 1974, No.2.
[7] PETRENKO, A.I., TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P. "An Inter-Active System on M-6000 for IC Layout Design", Automation, Novosibirsk, 1974, No.2.
[8] PETRENKO, A.I., SAVATIEV, V.A., TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P. "An Inter-Active Graphic System for IC Layout Design ", Control Systems and Machines, Kiev, 1974, No. 5.
[9] TETELBAUM, A. "Application of Negative Immitances for Circuit Equations Formation", Transaction of Soviet Higher Education Radioelectronics, 1974, Vol. 17, No. 2, pp.105 107. [Translated in English by Plenum Publishing Corporation (USA).]
[10] PETRENKO, A.I. and TETELBAUM, A. "One method of MOS VLSI Layout Design", Transaction of Soviet Higher Education Radioelectronics, 1974, Vol. 17, No. 6, pp.81 92. [Translated in English by Plenum Publishing Corporation (USA).]
[11] PETRENKO, A.I. and TETELBAUM, A. "An Analog Model for the Placement Problem", Transaction of Soviet Higher Education – Radioelectronics, 1975, No. 6, pp.113 116. [Translated in English by Plenum Publishing Corporation (USA).]
[12] TETELBAUM, A. "An Algorithm for Circuit Partitioning", Electronic Design Automation, Kiev, 1975, No. 12.
[13] PETRENKO, A.I., TETELBAUM A., and CURIN, O.P., "Formation of Graphic Objects", Control Systems and Machines, Kiev, 1975, No. 1.
[14] PETRENKO, A.I. and TETELBAUM, A. "Partitioning of a System into Chips", CAD in Electronics, Moscow, 1975, No.3.
[15] TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P., "Partitioning of a Graphic System Software", Electronic Design Automation, Kiev, 1975, No. 11.
[16] TETELBAUM, A. "Optimal Placement of Components and Public Pins", Electronic Design Automation, Kiev, 1975, No. 11.
[17] TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P. "A Program for Structure Selecting of a Graphic System", Research Works in Universities, Kiev, 1975, No. 1.
[18] TETELBAUM, A. "A Program for Hardware/Software Partitioning", Research Works in Universities, Kiev, 1975, No. 2.
[19] TETELBAUM, A. and BOBOVSKY, V.V. "IC Layout Design", Radio-Electronics, Kiev, 1975, No. 12.
[20] TETELBAUM, A. "An Algorithm of Transformation from the Ideal Placement to Slots", Calculations Methods, Kaunas, 1975, No.1.
[21] PETRENKO, A.I., SAVATIEV, V.A., TETELBAUM, and CURIN, O.P. "An Inter-Graphic System for Layout Checking", Mechanization and Automation of Control, Kiev, 1975, No.6.
[22] TETELBAUM, A., "Evaluation of the Minimal Total Connection Length", Radio-Electronics, Kiev, 1976, No. 13.
[23] PETRENKO, A.I. and TETELBAUM, A. "Reduction of CAD Problems to Bivalent Programming", Cybernetics, 1976, No. 3, pp.64 69. [Translated in English in the USA: Journal of Computer and Systems Sciences International.]
[24] PETRENKO, A.I., TETELBAUM, A. and CURIN, O.P. "Computer-Aided Design of Logic Circuits", Electronic Design Automation, Kiev, 1976, No. 13.
[25] PETRENKO, A.I., SAVATIEV, V.A., TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P. "An Inter-Graphic System for IC Layout Design", Research Works in Universities, Kiev, 1976, No. 1.
[26] TETELBAUM, A. and SHRAMCHENKO, B.L. "Planarity Determination of an Electronic Circuit", Calculations Methods, Kaunas, 1976, No.1.
[27] PETRENKO, A. I., TETELBAUM, A. and ZABALUEV, N.N. "A Topological Model for Routing", Calculations Methods, Kaunas, 1976, No.2.
[28] PETRENKO, A. I., TETELBAUM, A. and ZABALUEV, N.N. "The State Parameters Method for Routing ", Control Systems and Machines, Kiev, 1976, No. 5.
[29] TETELBAUM, A. "A Target Method for the Placement", Electronic Design Automation, Kiev, 1976, No. 14.
[30] PETRENKO, A.I., TETELBAUM, A. and CURIN, O.P. "A Graphic Board for Layout Design", Checking", Research Works in Universities, Kiev, 1976, No. 1.
[31] PETRENKO, A.I., TETELBAUM, A., BOBOVSKY, V.V. and CURIN, O.P. "A Graphic System for Layout Checking", Research Works in Universities, Kiev, 1976, No. 2.
[32] TETELBAUM, A. and SHRAMCHENKO, B.L. "Methods of Electronic Design Automation", Foreign Electronics, Moscow, 1977, No. 2.
[33] PETRENKO, A. I., TETELBAUM, A. and ZABALUEV, N.N. "An Algorithm of the Wire Sorting for Multilayer PCBs ", Control Systems and Machines, Kiev, 1977, No. 1.
[34] TETELBAUM, A. "Formulation and Solution of Some Layout Problems", Electronic Design Automation, Kiev, 1977, No. 15.
[35] TETELBAUM, A. "A Flexible Method of Wire Routing", Calculations Methods, Kaunas, 1977, No.1.
[36] TETELBAUM, A. and CURIN O.P. "A Fast Graphic Capture Board", Automatics, Kiev, 1977, No. 3.
[37] TETELBAUM, A. "A Sequential-Parallel Algorithm for Placement ", Control Systems and Machines, Kiev, 1977, No. 5.
[38] TETELBAUM, A. "A Partitioning Algorithm with the Characteristic Function Analysis", Electronic Design Automation, Kiev, 1977, No. 16.
[39] PETRENKO, A. I., TETELBAUM, A. "A Graph-Model of a Circuit", Homogeneous Computer Structure, Taganrog, 1977, No.8.
[40] TETELBAUM, A. and SHRAMCHENKO, B.L. "A Criterion of the Circuit Planarity", CAD Systems, Penza, 1977, No.3.
[41] TETELBAUM, A. "Conference on Electrical Layout Design Automation", Control Systems and Machines, Kiev, 1978, No. 3.
[42] TETELBAUM, A. "A Pin Assignment in Routing Process", Calculations Methods, Kaunas, 1978, No.1.
[43] TETELBAUM, A. "An Algorithm of Connection Layering", Research Works in Universities, Kiev, 1978, No. 2.
[44] TETELBAUM, A. and SHRAMCHENKO, B.L. "Hypergraphs for Planar Analysis of Electronic Circuits", Academy of Science of the USSR News Engineering Cybernetics, 1978, No. 5, pp.127 136. [Translated in English by RCS Journals, Inc. (USA), Title: Radio Electronics and Communications Systems.]
[45] PETRENKO, A.I. and TETELBAUM, A. "Models of Electronic Devices in Solving Design Problems", Cybernetics. 1978, No. 2, pp.47 54. [Translated in English by Plenum Publishing Corporation (USA).]
[46] PETRENKO, A. I., TETELBAUM, A., ABAKUMOV, V.G. and SHRAMCHENKO, B.L. "Methods for Electronic Design Automation (Part 2)", Electronic Design Automation, Kiev, 1978, No. 18.
[47] PETRENKO, A. I., TETELBAUM, A., ABAKUMOV, V.G. and SHRAMCHENKO, B.L. "Methods for Electronic Design Automation (Part 1)", Electronic Design Automation, Kiev, 1978, No. 17.
[48] PETRENKO, A. I., TETELBAUM, A. and ZABALUEV, N.N. "The Topological Method of Routing", Micro Electronics, Moscow, 1978, No.2 (8). [Classified].
[49] PETRENKO, A. I., TETELBAUM, A. and ZABALUEV, N.N. "State Parameters for Description of a PCB Topological Model", Radio-Electronics, Kiev, 1978, No. 15. TETELBAUM, A. "The Topological Analysis of Electronic Circuits", Radio-Electronics, Kiev, 1978, No. 15.
[50] TETELBAUM, A. "An Adaptive Routing Algorithm", Analysis and Design Automation, Kiev, 1978, No. 1.
[51] PETRENKO, A.I., TETELBAUM, A. and CURIN, O.P. "Time Optimization of Photo- Masks Production", Homogeneous Computer Structure, Taganrog, 1978, No.9.
[52] PETRENKO, A. I., TETELBAUM, A. and SHRAMCHENKO, B.L. "The Topological Method of Layout Design", Micro Electronics, Moscow, 1978, No.4 (10).
[53] TETELBAUM, A. "Evaluation of Layout Characteristics", Electronic Design Automation, Kiev, 1979, No. 19.
[54] TETELBAUM, A. "Existence of a Layout Realization for a Given Circuit", Layout Design Automation, Vilnius, 1979, No.2.
[55] TETELBAUM, A. and SHRAMCHENKO, B.L. "The Topological Approach to Circuit Design Automation ", Analysis and Design Automation, Kiev, 1979, No. 2.
[56] TETELBAUM, A. "The Probability Approach for Size Estimation of Printed Circuits", Transaction of Soviet Higher Education Radioelectronics, 1979, Vol. 22, No. 3, pp.35 40. [Translated in English by RCS Journals, Inc. (USA), Title: Radio Electronics and Communications Systems.]
[57] PETRENKO, A.I., TETELBAUM, A. and ZABALUEV, N.N. "Topological Routing of Multilayer PCBs ", Analysis and Design Automation, Kiev, 1979, No. 3.
[58] TETELBAUM, A. and VAGENIN, L.N. "Electrical Layout Design Automation", Control Systems and Machines, Kiev, 1980, No. 4.
[59] TETELBAUM, A. "Number of Classes of the Isotopic Imbedding of a Graph", Academy of Science of the USSR News Engineering Cybernetic2, 1980, No. 3, pp.200 202. [Translated in English by Plenum Publishing Corporation (USA).]
[60] PETRENKO, A.I., TETELBAUM, A. and SHRAMCHENKO, B.L. "Optimal Graph Path Search in the State Space", Academy of Science of the USSR News Engineering Cybernetics, 1980, No. 6, pp.119 125. [Translated in English by Plenum Publishing Corporation (USA).]
[61] PETRENKO, A.I., TETELBAUM, A. and ZABALUEV, N.N. "Topological Routing and Optimization", Analysis and Design Automation, Kiev, 1980, No. 2.
[62] TETELBAUM, A. "Prediction of the Connection Routability", Electronic Design Automation, Kiev, 1980, No. 21.
[63] TETELBAUM, A. "Existence of a Physical Realization of an Electronic Circuit", Micro Electronics, Moscow, 1980, No.2 (20).
[64] PETRENKO, A.I., TETELBAUM, A., KUREICHIK, V.M., SHRAMCHENKO, B.L. and PERELMAN, A. "Gate Array Design Automation Review", Foreign Electronics, Moscow, 1981, No.6.
[65] PETRENKO, A. I., TETELBAUM, A. and SHRAMCHENKO, B.L. "ARAMIS - Program for the Adequate IC Model Realization", Layout Design Automation, Vilnius, 1981, No.1.
[66] TETELBAUM, A. "The Hierarchical Approach to VLSI Circuit Design", Micro Electronics, Moscow, 1981, No.2 (50).
[67] TETELBAUM, A. "Program VEST of Capacity Calculation for Arbitrary Shape Connections", Electronic Design Automation, Kiev, 1981, No. 24.
[68] PETRENKO, A.I., TETELBAUM, A. and SHRAMCHENKO, B.L. "The Algebraic Formulation of CAD Problems", Cybernetics. 1981, No. 2, pp.49 55. [Translated in English by Plenum Publishing Corporation (USA).]
[69] TETELBAUM, A. "Interconnection Ordering for a Multilayer PCB Router", Electrical Design Automation, Taganrog, 1982, No.1.
[70] TETELBAUM, A. "Optimization of Layout with the Simplex Method", Electronic Design Automation, Kiev, 1982, No. 25.
[71] TETELBAUM, A. "Analysis of Routing Optimization Procedures", Electronic Design Automation, Kiev, 1982, No. 26.
[72] PETRENKO, A. I., TETELBAUM, A. and SHRAMCHENKO, B.L. "System ARTIS for Gate Array Design", Layout Design Automation, Vilnius, 1983, No.3.
[73] TETELBAUM, A. "New Textbook on Design Automation", Control Systems and Machines, Kiev, 1984, No. 4.
[74] TETELBAUM, A., SHRAMCHENKO, B.L., BONK, A. and TIMCHENKO, S. "An Algorithm of IC Model Embedding ", Radio-Electronics, Kiev, 1984, No. 21.
[75] TETELBAUM, A. and SHRAMCHENKO, B.L. "A Hierarchical Iterative Routing of PCBs", Layout Design Automation, Vilnius, 1984, No.4.
[76] PETRENKO, A.I., TETELBAUM, A., SHRAMCHENKO, B.L. and LUGANSKY, N., "Gate Array Design Automation", Foreign Electronics, Moscow, 1985, No.8.
[77] TETELBAUM, A., SHRAMCHENKO, B.L. and LUGANSKY, N. "Gate Array Placement", Electronic Design Automation, Kiev, 1985, No. 32.
[78] TETELBAUM, A. "The Adequate Topological IC Model, Parallel Planarization and Embedding", Micro Electronics, Moscow, 1985, No.2 (50).
[79] TETELBAUM, A., SHRAMCHENKO, B.L. and ANGELOV, A. "Synthesis of IC Layout", Control Systems and Machines, Kiev, 1986, No. 1.
[80] TETELBAUM, A., SHRAMCHENKO, B.L., BONK, A. and TIMCHENKO, S. "An Algorithm of Planarization and Embedding of an IC Model", Radio-Electronics, Kiev, 1986, No. 23.
[81] PETRENKO, A.I., TETELBAUM, A., SHAMCHENKO, B.L. and LUGANSKY, N. "Investigation of Two-Level Placer and Router of Gate Arrays", Layout Design Automation, Vilnius, 1986, No.6.
[82] PETRENKO, A.I., TETELBAUM, A., SHRAMCHENKO, B.L. and LUGANSKY, N. "Optimal Placement of Gate Array Feedthroughs", Electronic Design Automation, Kiev, 1986, No. 33.
[83] PETRENKO, A.I., TETELBAUM, A., SHRAMCHENKO, B.L. and TITOV, A. "PCB Design in ARM2-01 Workstation ", Control Systems and Machines, Kiev, 1987, No. 1.
[84] TETELBAUM, A. "Estimation of Layout Characteristics", Mathematical and Computer Modeling, Vilnius, 1987, No.2.
[85] TETELBAUM, A., SHRAMCHENKO, B.L. and LUGANSKY, N. "Estimation of the Block Interconnection Number", Electronic Design Automation, Kiev, 1987, No. 36.
[86] TETELBAUM, A. and ITKIN V.M. "Methodology of the Layout Design", Layout Design Automation, Vilnius, 1987, No.7.
[87] TETELBAUM, A. "Principles of VLSI Circuits CAD Systems Creating", Numerical Methods and Design Automation, Tallinn, 1987, No. 1.
[88] PETRENKO, A.I., TETELBAUM, A. and ITKIN V.M. "Partitioning on the Basis of the Layout Complexity", Electrical Design Automation, Taganrog, 1987, No.6.
[89] PETRENKO, A.I., TETELBAUM, A. and ZABARA, S.S. "Concepts of Creating of Layout Design Systems ", Control Systems and Machines, Kiev, 1988, No. 1.
[90] TETELBAUM, A. and LOBAK, M.I. "Quick Pre-Routing of PCBs", Electronic Design Automation, Kiev, 1988, No. 37.
[91] TETELBAUM, A. and BILA, Y.N. "Increasing Quality of PCBs", Electronic Design Automation, Kiev, 1988, No. 38.
[92] TETELBAUM, A. "The Force Placement of a Planar Graph", Academy of Science of the USSR News Engineering Cybernetics, 1988, No. 3, pp.131 137. [Translated in English in the USA: Journal of Computer and Systems Sciences International.]
[93] TETELBAUM, A. "Imbedding of a Graph with the Quasiminimal Edge Intersection Number", Academy of Science of the USSR News Engineering Cybernetics, 1989, No. 2, pp.173 175. [Translated in English in the USA: Journal of Computer and Systems Sciences International.]
[94] TETELBAUM, A. "Imbedding of a Graph with the Quasiminimal Edge Intersection Number", Academy of Science of the USSR News Engineering Cybernetics, 1989, No. 2, pp.173 175. [Translated in English in the USA: Journal of Computer and Systems Sciences International.]
[95] TETELBAUM, A. "Force Embedding of the Circuit Graph", Electronic Design Automation, Kiev, 1989, No. 33.
[96] TETELBAUM, A. and MATVEEV, V.I. "Relational Approach to Hybrid Assembly Design", Electronic Design Automation, Kiev, 1989, No. 39.
[97] TETELBAUM, A. "Review of CAD Systems for Gate Array Design", Information, Moscow, 1989, No. 10.
[98] TETELBAUM, A. "Acceleration of the Graphic Information Processing", Programming, Varna, 1989, No. 14.
[99] TETELBAUM, A. "Estimation of the Layout Design Complexity", Numerical Methods and Design Automation, Tallinn, 1989, No. 1.
[100] TETELBAUM, A., SHRAMCHENKO, B.L. and DEMYANENKO, O. "Automatic Placement for ARM2-01 Workstation", Electronic Equipment and Computer Design Automation, Moscow, 1992, No. 1.
[101] TETELBAUM, A. "A Component Placement of VLSI Gate Arrays", Electronic Design Automation, Kiev, 1991, No. 44.
[102] TETELBAUM, A. and BILA, Y.N. "Optimization of a Printed Circuit Board Layout", Electronic Design Automation, Kiev, 1992, No. 46.
[103] TETELBAUM, A. "Personal Computer Market in Ukraine", Ukrainian Business Digest, USA, 1992, Vol. 2, No. 3.
[104] TETELBAUM, A. "Complicated Path Function Search", in Proc. of 37th Midwest Symp. on Circuits and Systems, Lafayette, Louisiana, USA, August 1994, pp. 385-388.
[105] TETELBAUM, A. and KUREICHIK, V.M. "A Graph Isomorphism Algorithm for Regular VLSI Structures", in Proc. of 28th Annual Conference on Information Sciences and Systems, Princeton University, New Jersey, USA, March 1994, 600-606.
[106] TETELBAUM, A. "CAD Education and Science in Ukraine after Perestroika", in Proc. of EURO-DAC'94, Grenoble, France, September 1994, pp.688-693.
[107] TETELBAUM, A. "Force Embedding of a Planar Graph", in Proc. of 26th IEEE Southeastern Symposium on System Theory, Athens, Ohio, USA, March 1994, pp. 2-6.
[108] TETELBAUM, A. "Interconnection Analysis of a Hierarchical System", in Proc. of Intern. AM SE Conf. on Systems Analysis, Control & Design--SYS'94, Lyon, France, 1994, Vol. 1, pp. 141-152.
[109] TETELBAUM, A. "A General Algorithm of the Optimal Path Search", in Proc. of Intern. AM SE Conf. on Systems Analysis, Control & Design--SYS'94, Lyon, France, 1994, Vol. 1, pp. 131-140.
[110] TETELBAUM, A., WEY, C.-L., and BICKART, T.A. "A Performance-driven Placement Approach of Standard Cells", in Proc of Int'l conf. on Intelligent Systems, Gelengick, Russia, September 1995, pp. 31-35.
[111] TETELBAUM, A. "Generalized Optimum Path Search", IEEE Trans. of Computer Aided Design of Integrated Circuits and Systems, CAD/ICAS, Vol. 14. NO. 12, December 1995, pp. 1586-1590.
[112] TETELBAUM, A. and SHANBLATT, M.A. "A Design Automation Methodology for Behavioral to Physical Design Linkage", in Proc of Int'l conf. on Intelligent Systems, Gelengick, Russia, September 1995, pp. 1-5.
[113] TETELBAUM, A. "Estimation of the Graph Partitioning for a Hierarchical System", in Proc. of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, San Francisco, California, USA, February 1995, pp. 500-502.
[114] TETELBAUM, A. "Estimations of Layout Parameters of Hierarchical Systems", in Proc. of 27th IEEE Southeastern Symposium on System Theory, Starkville, Mississippi, USA, March 1995, pp. 123-128.
[115] TETELBAUM, A. "Generalizations of Rent's Rule", in Proc. of 27th IEEE Southeastern Symposium on System Theory, Starkville, Mississippi, USA, March 1995, pp. 011-016.
[116] TETELBAUM, A. "Path Search for Complicated Function", in Proc. of 1995 IEEE International Symposium on Circuits and Systems, Seattle, Washington, USA, April-May, 1995, pp.245-248.
[117] TETELBAUM, A. and SHANBLATT, M.A., "Framework of a New Methodology for Behavioral to Physical Design Linkage", in Proc. of 38th Midwest Symp. On Circuits and Systems, Rio de Janeiro, Brazil, Vol.1, 1996, pp.318-321.
[118] TETELBAUM, A. "Prediction of Structure and Layout Parameters for a Hierarchical System", Computers and Structures, V0058 N4, Feb 17, pp. 809-824, 1996.
[119] TETELBAUM, A. "From Ukraine with Love", Electronic Business, November 2005, pp. 22.
[120] TETELBAUM, A. “Statistical STA: Crosstalk Aspect”, in Proc. of 2007 International Conf. on Integrated Circuits Design and Technology, Austin, Texas, USA, May-June, 2007, pp. 27-32.
[121] WU, S.H., TETELBAUM, A., WANG, L.C. “How Does Inversed Temperature Dependence Affect Timing Sign-off”, in Proc. of 2007 International Conf. on Integrated Circuits Design and Technology, Minatec Grenoble, France, June 2nd – June 4th, 2008, pp. 297-300.
[122] WU, S.H., CHAKRAVARTY, S., TETELBAUM, A., WANG, L.C. “Refining Delay Test Methodology Using Knowledge of Asymmetric Transition Delay”, in Proc. of The Seventh Asian Test Symposium, Sapporo, Japan, 24-27 November 2008, pp. 137-142.
[123] CALLEGARI N., BASTANI, P.,. WANG, LI-C, CHAKRAVARTY, S., TETELBAUM, A. “Path selection for monitoring unexpected systematic timing effects” In the Proc. of the 14th Asia and South Pacific Design Automation Conference (ASPDAC20009), Yokohama, Japan, January 19-22, 2009, pp. 781-786.
[124] TETELBAUM, A., LAUBHAN, R., KEYSER, D. Advanced OCV Timing Derating Experience, In the Proc. of the SNUG Conference, San Jose, 2011, 19pp.
[125] VENKATRAMAN, R., TETELBAUM, A., CASTAGNETTI, R. " Experimental Methodology for Validating Timing Closure with Advanced On-Chip Variation (AOCV) ", in Proc. of DAC'11, San Diego, USA, June 2011, pp.688-693.
Archived Documents and Educational Materials Dr. Alexander Tetelbaum's extensive contributions to computer science and education include numerous white papers, research reports, corporate, invited talks, and conference presentations, and patents that remain archived within the repositories of Intreen Corp.^{[Source 1]}, Abelite Design Automation, Inc.^{[Source 2]}, Genetic Algorithms Research and Applications Group (GARAGE) of the MSU, and the Kyiv Polytechnic Institute (KPI). While most of these materials were not formally published, they show technical and theoretical advancements in the fields of artificial intelligence, high-level synthesis, and statistical timing analysis. Some examples of these documents include:
- Technical Reports and White Papers detailing novel approaches to Statistical Static Timing Analysis (SSTA).
- Provisional Patents filed during the operational periods of Intreen and Abelite.
- Research Presentations delivered at internal and external conferences and seminars.
- Design Flow Guidelines for digital systems, integrating state-of-the-art tools and methodologies. Additionally, Dr. Tetelbaum developed a variety of educational materials and manuals during his tenure at KPI and Michigan State University (MSU). These resources, widely used in academia, facilitated the learning of advanced topics in electronics, computer engineering, and problem-solving methodologies. These documents are not referenced in the section “Contributions in Computer Science” of this page due to their unpublished nature. However, they underscore the breadth of Dr. Tetelbaum's impact on the scientific community and his dedication to advancing knowledge in his field.
[Intreen 1] INTREEN TECHNOLOGY FOR INTELLIGENT RELATION INTERNET SEARCH (White paper) by Dr. Alexander Tetelbaum, 61 p. Dec, 2004.
[Intreen 2] INTREEN TECHNOLOGY: PROTOTYPE IMPLEMENTATION FLOWCHARTS (White paper) by Dr. Alexander Tetelbaum, 16 p. Feb. 2005.
[Intreen 3] INTREEN Technology for Intelligent Relation Search, Alexander Tetelbaum, 68 p., Dec 2004
[Intreen 4] Intreen Prototype -- Demo Version: Layout and Features, Alexander Tetelbaum, 12 p., Sept 2005.
[P1, Intreen] TETELBAUM, A., INTREEN TECHNOLOGY FOR INTELLIGENT RELATION INTERNET SEARCH, Doc. No. 04-001. pp. 57. (provisional version of the patent filed on 11/19/2004).
[P2, Intreen] TETELBAUM, A., COTREEN TECHNOLOGY FOR DOCUMENT AND KEYWORD RELATION INTERNET SEARCH. Doc. No. 05-001. 44 p. (provisional version of the patent filed on 1/19/2005.
[P3, Intreen] TETELBAUM, A., TETREEN TECHNOLOGY FOR TRACKING KEYWORD TERMINOLOGY DURING INTERNET SEARCH. Doc. No. 05-002. 26 p. (provisional version of the patent filed on 2/2/2005).
[P4, Intreen] TETELBAUM, A., RETREEN: RELATION TRACING ENGINE AND VISUALIZATION. 53 p. (provisional version of the patent filed on 8/8/2005).
[Abelite 1] Comments on Isadore Katz Notes at DeepChip (White paper) , Alexander Tetelbaum, 10 p. , Feb 2014.
[Abelite 2] Corner-based Timing Signoff and What Is Next (White paper) , Alexander Tetelbaum, 47 p. , May 2015.
[Abelite 3] Design for Variability and Signoff Tips (White paper) , Alexander Tetelbaum, 47 p. , Feb 2016.
[P 1, Abelite] TETELBAUM, A., Buffer Insertion Patent (Draft), Nov. 2013, 9 p.
[P 2, Abelite] TETELBAUM, A., Clock Design vs. Clock Skew Variability (Draft), Mar 2014, 5 p.
[P3, Abelite] TETELBAUM, A., New RC-model for Interconnect (Draft), Sep 2014, 24 p.
[P4, Abelite] TETELBAUM, A., New RC-model for Interconnect (Draft), Dec 2014, 6 p.
[P5, Abelite] TETELBAUM, A., Clock Design vs. Clock Skew Variability (Draft), Feb 2015, 20p.


Patents

Alexander Tetelbaum is a prolific inventor with a portfolio of 43 patents. These patents represent innovations primarily in electronics, computer science, and Electronic Design Automation (EDA). Below is a high-level overview of his notable contributions:
• Circuit Design Automation: Algorithms and methods for automating the design and analysis of electronic circuits.
• Optimization Techniques: Patents for improving electronic system performance and energy efficiency.
• Artificial Intelligence Applications: Patented AI-driven systems applied in industrial and engineering contexts.

List of patents: (Referred as [P-Number])

[P1] TETELBAUM, A. Circuit Timing Analysis Incorporating the Effects of Temperature Inversion. Part 1. Patent No. US 8,645,888. February 4, 2014.
[P2] TETELBAUM, A. Intelligent Dummy Metal Fill Process For Integrated Circuits. Patent No. US 8,397,196. March 12, 2013.
[P3] TETELBAUM, A. ., CHAKRAVARTY, S. Timing error sampling generator and a method of timing testing. Patent No. US8,473,890B2. June 25, 2013.
[P4] TETELBAUM, A., JAMANN, J., LAUBHAN, R., ZAHN, B. Implementing And Checking Electronic Circuits With Flexible Ramptime Limits And Tools For Performing The Same. Patent No. US 8,332,792. December 11, 2012
[P5] TETELBAUM, A., MOLINA, R. Method And Apparatus Of Core Timing Prediction Of Core Logic In The Chip-Level Implementation Process Through An Over-Core Window On A Chip-Level Routing Layer. Patent No. US 8,321,826. November 27, 2012.
[P6] TETELBAUM, A. Reducing Path Delay Sensitivity to Temperature Variation in Timing-Critical Paths. Patent No. US 8,225,257. July 17, 2012.
[P7] TETELBAUM, A. Circuit Timing Analysis Incorporating the Effects of Temperature Inversion. Part 1. Patent No. US 8,181,144. May 15, 2012.
[P8] TETELBAUM, A., CHAKRAVARTY, S. Electronic Design Automation Tool And Method For Optimizing The Placement Of Process Monitors In An Integrated Circuit. Patent No. US 8,010,935. August 30, 2011.
[P9] TETELBAUM, A., CHAKRAVARTY, S. System And Method For Reducing The Generation Of Inconsequential Violations Resulting From Timing Analyses. Patent No. US 7,971,169. Date of Patent: Jun. 28, 2011.
[P10] TETELBAUM, A., MOLINA, R. Method and Apparatus of Core Timing Prediction of Core Logic in the Chip Level Implementation Process through an Over-Core Window on a Chip-Level Routing Layer. Patent No. US 7,739,639 B2. Jun. 15, 2010
[P11] TETELBAUM, A., et al. Method and Computer Program for Static Timing Analysis with Delay De-Rating and Clock Conservatism Reduction. Patent No. US 7,480,881. Jan. 20, 2009
[P12] TETELBAUM, A., Method and Computer Program for Detailed Routing of an Integrated Circuit Design with Multiple Routing Rules and Net Constraints. Patent No. US 7,370,309. May 6, 2008
[P13] TETELBAUM, A., Method of Estimating a Total Path Delay in an Integrated Circuit Design with Stochastically Weighted Conservatism. Patent No. US 7,213,223. May 1, 2007
[P14] TETELBAUM, A., Method and Computer Program For Estimating Speed-Up And Slow-Down Net Delays For Integrated Circuit Design. Patent No. US 7,178,121. Feb 13, 2007
[P15] TETELBAUM, A., MBOUOMBOUO, B., Method Of Floor-planning And Cell Placement For Integrated Circuit Chip Architecture With Internal I/O Rings. Patent No. US 7,174,524. Feb 6, 2007
[P16] TETELBAUM, A., Method of Finding Critical Nets in an Integrated Circuit Design. Patent No. US 7,107,558. Sep. 12, 2006
[P17] TETELBAUM, A., Method of Clock Driven Cell Placement and Clock Tree Synthesis for Integrated Circuit Design. Patent No. US 7,039,891. May 2, 2006
[P18] TETELBAUM, A., Minimal Bends Connection Models for Wire Density Calculation. Patent No. US 7,076,406. Jul. 11, 2006
[P19] TETELBAUM, A., Method of Noise Analysis And Correction Of Noise Violations For An Integrated Circuit Design. Patent No. US 7,062,731. Jun. 13, 2006
[P20] TETELBAUM, A., Method of Automated Repair of Crosstalk Violations And Timing Violations In An Integrated Circuit Design. Patent No. US 7,062,737. Jun. 13, 2006
[P21] TETELBAUM, A., Intelligent Crosstalk Delay Estimator For Integrated Circuit Design Flow. Patent No. US 7,043,708. May 9, 2006
[P22] TETELBAUM, A., Method and Apparatus For Implementing A Co-Axial Wire In A Semiconductor Chip. Patent No. US 7,015,569. Mar. 21, 2006
[P23] TETELBAUM, A., Intelligent engine for protection against injected crosstalk delay. Patent No. US 6,948,142. Sep. 20, 2005.
[P24] TETELBAUM, A., Integrated design system and method for reducing and avoiding crosstalk. Patent No. US 6,907,590. Jun. 14, 2005.
[P25] TETELBAUM, A., Integrated design system and method for reducing and avoiding crosstalk. Patent No. US 6,907,586. Jun. 14, 2005.
[P26] TETELBAUM, A., Wire delay distributed model. Patent No. US 6,880,141. Apr.12, 2005.
[P27] TETELBAUM, A., Global Chip Interconnect. Patent No. US 6,842,042. Jan. 11, 2005.
[P28] TETELBAUM, A., Integrated Circuit Design Flow With Capacitive Margin. Patent No. US 6,810,505. Oct. 26, 2004.
[P29] TETELBAUM, A., Method for minimizing clock skew by relocating a clock buffer until clock skew is within a tolerable limit. Patent No. US 6,725,389. Apr. 20, 2004.
[P30] TETELBAUM, A., Method for Estimating Cell Porosity of Hardmacs. Patent No. US 6,611,951. Aug. 26, 2003.
[P31] TETELBAUM, A., Method of Control Cell Placement To Minimize Connection Length And Cell Delay. Patent No. US 6,609,238. Aug. 19, 2003.
[P32] TETELBAUM, A., Integrated Design System and Method for Reducing and Avoiding Crosstalk. Patent No. US 6,594,805. Jul. 15, 2003.
[P33] TETELBAUM, A., Method For Minimizing Clock Skew For An Integrated Circuit. Patent No. US 6,594,807. Jul. 15, 2003.
[P34] TETELBAUM, A., Method Of Control Cell Placement For Datapath Macros In Integrated Circuit Designs. Patent No. US 6,588,003. Jul. 1, 2003.
[P35] TETELBAUM, A., Method of Datapath Cell Placement For Bitwise and Non-Bitwise Integrated Circuit Designs. Patent No. US 6,560,761. May 6, 2003.
[P36] TETELBAUM, A., Elmore Model Enhancement. Patent No. US 6,543,038. Apr. 1, 2003.
[P37] TETELBAUM, A., Method for Estimating Porosity of Hardmacs. Patent No. US 6,532,572. Mar. 11, 2003.
[P38] TETELBAUM, A., Method Of Global Placement Of Control Cells And Hardmac Pins In A Datapath Macro For An Integrated Circuit Design. Patent No. US 6,507,937. Jan. 14, 2003.
[P39] TETELBAUM, A., Method of Clock Buffer Partitioning To Minimize Clock Skew For An Integrated Circuit Design. Patent No. US 6,502,222. Date of Patent: Dec. 31, 2002.
[P40] TETELBAUM, A., Method of Datapath Cell Placement For An Integrated Circuit. Patent No. US 6,496,967. Dec. 17, 2002.
[P41] TETELBAUM, A., Balanced Clock Placement for Integrated Circuits Containing Megacells. Patent No.: US 6,480,994. Nov. 12, 2002.
[P42] TETELBAUM, A., Pin Placement Method For Integrated Circuits. Patent No.: US 6,449,760. Sep. 10, 2002.
[P43] TETELBAUM, A., Method of Generating An Optimal Clock Buffer Set For Minimizing Clock Skew In Balanced Clock Trees. Patent No.: US 6,442,737. Aug. 27, 2002.








Personal life

(Under Construction, TBD)

Aliases: Alexander Y. Tetelbaum, Aleksander Tetelbaum, Russian: Алеκсандр Яковлевич Тетельбаум, Ukrainian: Олеκсандр Якович Тетельбаум.




His hobbies include oil painting, table tennis, chess, solving and developing puzzles (books: "Yes-No Puzzles & Games",[9] "Puzzle Games For Kids",[10] "Solving Non-Standard Problems",[11] "Solving Non-Standard Very Hard Problems"[12]) in non-standard thinking and critical problem-solving. "Minimum Number of Timing Signoff Corners".[13] His latest books are thrillers "Omerta Operations"[14] and Executive Director.[15] Sand wallyball -mercury news [???]




References

(Under Construction, TBD)




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