File:TTL-00-die-schema.jpg
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Summary
| Description |
Français : Repérage des transistors et des résistances d'une porte logique TTL '00 (NON-ET à deux entrées) et schéma électronique correspondant. English: Identification of transistors and resistors of a TTL '00 logic gate (two-input NAND) and corresponding circuit diagram. |
| Date | |
| Source | Mister rf |
| Author | PA5CAL France |
| Other versions |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 07:11, 12 July 2022 | | 1,200 × 600 (117 KB) | PA5CAL France | Retouche |
| 22:54, 28 June 2022 |  | 1,200 × 600 (87 KB) | PA5CAL France | Uploaded own work with UploadWizard |
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